1. Field of the Invention
The present invention relates to a logic element constructed in E.sup.2 CL technology, and more particularly to a logic element which comprises a differential amplifier including two emitter-coupled transistors having emitter-side constant current feed.
2. Description of the Prior Art
The basic element of logic elements constructed in E.sup.2 CL technology is, as known, a differential amplifier having two transistors whose emitters are connected together. A constant current is fed in at the junction of the emitters. The base of one of the transistors is connected to a fixed reference potential, while the base of the other transistor is connected to the emitter of a further transistor, connected as an emitter follower, the further transistor being controlled by an input signal. A collector load resistor is provided for each transistor of the differential amplifier.
Two complementary output signals can be tapped at the collectors. When only one output signal is required, then the collector resistor of the transistor at which no output signal is tapped can be eliminated. The collector of this transistor is directly connected to the collector power supply.
Integrated modules are checked before use in larger circuit aggregates, since subsequent localization of faulty modules and their replacement is frequently a very laborious and time consuming operation. The check of integrated modules for the elimination of faulty units occurs by applying bit patterns and, insofar as required, clock signals, to the input terminals and by observing the derived output signals. Purely dynamic measurements, such as the measurement of signal transit times and signal-to-noise ratios, are not carried out. However, internal circuit faults can exist which are generally not perceptible given such a check but, which, for example reduce the reliability from disruption or increase the signal transit time and, therefore, lead to outages given use in a system.
Such a fault which is usually not perceptible exists in circuit arrangements of E.sup.2 CL technology when the collector of that transistor in the differential amplifier at which no output signal is tapped is not connected due to a manufacturing error.